Reborn in 2010, the AI ​​in my mind is too powerful.

A week later, Aurora Group's Wanguoyuan wafer fab signed a contract with Qualcomm and officially began producing chips for Qualcomm.

This event made headlines that very day, as it was a major breakthrough for China's chip manufacturing industry.

A few days later, Aurora Group officially invested in Xiaomi. On the same day, six other investment institutions immediately followed suit, and were very pleased to raise their previous offers, offering a total of US$5 million to acquire 5% of Xiaomi's shares.

Xiaomi also held a press conference to announce that it would establish its own Android branch in China, named the Surge OS, and create a Surge Alliance to help other Chinese manufacturers break free from the control of Google's system.

Samsung, LG, and Qualcomm all attended the press conference that day, announcing a strategic partnership with Xiaomi and joining the Surge Alliance.

In addition to providing some technical support, the two companies will also install Surge OS on their mobile phones entering the Chinese market in the future.

Companies in China that have joined the Surge Alliance can also use Samsung's ONE UI overseas.

This is practically a suggestion that Huawei, ZTE, and Lenovo, which are already using Samsung's operating system overseas, should hurry up and get on board.

Many Chinese smartphone manufacturers, still in their early stages of development, are somewhat clueless.

They felt that getting on the bus directly was like signing a humiliating treaty that ceded national sovereignty.

But if I don't get on the bus, it seems like I can't win.

It is said that the Qing Dynasty spirit possessed him.

But Chen Yiran no longer cared about these things; they were all minor matters. After promising his grandmother that he would see his great-grandson within a year, he returned to Silicon Valley with two beautiful women.

Having a private jet is quite comfortable, and Chen Yiran was able to unlock a life achievement, returning to Silicon Valley in a flash.

Because the raw latte test wafers from WanGuoYuan have already been delivered to Silicon Valley, and the mocha test chips from Samsung have also arrived.

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In FlowEDA's new lab, the coffee project team began testing.

Chen Yiran wasn't very familiar with this. Although he knew the process, he had never actually done it before.

Seeing it with my own eyes now, I find it quite interesting.

The first thing they did during chip testing was to poke the chip with a wafer-level probe to see if the chip was dead.

The bare die was placed on the probe station, and the tungsten probe was inserted into the test pad. The static current of each power rail was measured in the first second after power-on.

If a power domain is short-circuited or leakage current surges, the die is ruined.

If there are no problems, an external clock source should be used to start the phase-locked loop circuit to oscillate and see if the phase-locked loop can lock to the target frequency.

If everything is fine, the chip will be used for functional verification.

The chip is mounted on a verification board and tested using a pre-prepared set of matrix multiplications with known results. The pulsating array starts running, outputting a partial sum in each cycle, which is compared with the pre-calculated reference value step by step.

If the rows and columns are misaligned, it's a bug in the control logic. If the calculation result is off by a few bits, there's a problem with the circuitry of one of the multipliers or adders.

Finally, a voltage-frequency scan is performed to plot the operating curve. Starting from the lowest operating voltage and moving upwards, the maximum frequency that can be reached at each voltage point before an error occurs. This data determines the power consumption and clocking strategy for subsequent mass-produced chips.

The final test results were mixed, but not entirely unexpected.

A single shot, a direct success—those are scenes only found in high-tech novels.

In reality, it's almost impossible to avoid problems during chip manufacturing.

Samsung's 28nm Mocha test chip has encountered some problems, but they are still under control.

Several critical paths occasionally miscalculated at nominal voltage, likely because the actual RC delay on silicon was a few percent larger than the simulation.

The logic of the entire chip is functional, and the pulsation array can run. However, the core voltage needs to be increased from 0.9V to 0.95V to stably reach the target frequency. The power consumption is increased by 10%, but it is not a functional problem.

The problems with the 40nm latte test chip made by WanGuoYuan were almost all due to immature technology.

The weight register used to store the systolic array, as well as the adjustable phase-locked loop, were designed by the Coffee Project team themselves, and are not part of the standard cell library.

Samsung, with its extensive experience, had no problem with it, but this kind of customized analog macro was a bit beyond the capabilities of WanGuoYuan.

The SRAM reads and writes normally at low frequencies, but after the frequency is increased to the nominal value, some bits start to flip.

After a long review, the project team finally confirmed that the parasitic capacitance model of the metal via was slightly off in PDK.

The same applies to adjustable phase-locked loops. The locking range is normal in simulation, but it is much narrower in real silicon because the Q value of the voltage-controlled oscillator inductance is underestimated.

In short, there are many problems, and adjustments are still needed.

However, the result wasn't too bad; Samsung proved that there were no problems with the basic design architecture.

Wanguoyuan also obtained important data, at least knowing which model parameters needed to be supplemented.

With the addition of manufacturing for Qualcomm, the technology of wafer fabs will gradually mature.

Compared to the coffee project team, the neighboring SEELE project team finally launched version 1.0 after three months of research and development.