In fact, Chen Yiran had already seen countless Chinese faces during the day's exhibition.

In front of the Synopsys booth, he saw several Chinese people wearing dark shirts with name tags that read HiSilicon, a chip design company under Huawei.

In 2010, they were working hard on the K3V2, the predecessor of the Kirin chip. This time, a lot of people from the physical design department came to evaluate new tools so they could negotiate prices with EDA vendors. EDA licensing fees were too expensive, and they were willing to take a look at any alternative solution.

Spreadtrum's representatives were also present. They just went public on Nasdaq last year and are currently the number one mobile baseband chip supplier in China. This time, their CTO personally led the team. Their booth wasn't large, but it was quite lively, surrounded by many people working on mobile baseband chips.

RDA Microelectronics set up a very small booth not far from Spreadtrum, but most of the staff were looking around at the technology.

The Loongson team from the Institute of Computing Technology, Chinese Academy of Sciences, held a presentation in the academic area. The Loongson 3A had just been taped out, and a few young people stood in front of the poster, explaining their processor architecture to everyone passing by in accented English, trying to get more people to come in and listen.

However, the effect was not good; most people just stopped to look at the poster and then left.

There are still many scholars left. Several professors from Tsinghua University's Institute of Microelectronics and Peking University brought many doctoral students to broaden their horizons. In a few years, these doctoral students will become the backbone of HiSilicon, Spreadtrum, and SMIC.

MediaTek's booth was quite lively, surrounded by various companies from Taiwan.

Finally, there was SMIC, whose booth was next to the coffee corner. It wasn't a big space, and there were only three or four staff members.

When Chen Yiran walked over, a middle-aged man wearing glasses was introducing SMIC's 45-nanometer logic process to two foreigners. The foreigners listened for a while, then took a brochure and left.

The middle-aged man turned around, saw Chen Yiran, glanced at FlowEDA on his name tag, and tried asking in Chinese, "You guys work in EDA?"

"Yes. Placement direction."

The fluent Mandarin made the middle-aged man pause for a moment.

"A new company? In Taiwan?"

"It was just established on Children's Day, it's brand new. I'm from Beijing, but the company is located in Silicon Valley."

The middle-aged man smiled, a hint of encouragement in his expression, and began to introduce himself: "I'm from SMIC's Design Services Department, my surname is Zhou. Which process technology do you use for verification?"

"Currently, we are using the public benchmark of ISPD 2006, but we haven't implemented it in real-world processes yet."

"45 nanometers or 28 nanometers?"

"Not yet. We just finished the benchmark test. The first thing we want to try is 40 nanometers."

Zhou was starting to get interested. SMIC's core product line in 2010 was 40nm. 45nm had just stabilized, and 40nm was still ramping up.

"You've chosen a very tricky timeframe. 45nm is already mature, 28nm is still in the pipeline, and 40nm is right in the middle. If you can develop good design tools on 40nm, there will be room for growth in the low-to-mid-range market for at least the next few years."

"It wasn't chosen, it was calculated. The design rules for 40nm are tighter than for 45nm, but not to the point of requiring double exposure. The physical model complexity of the standard cell is just within the optimal range for an incremental computing engine."

Mr. Zhou didn't think a new company could achieve anything, but in keeping with the Chinese spirit of "since we're already here," he nodded and said, "Could you please leave your contact information? When will your placement search engine be up to a point where we can take a look? Send me an email, just in case we can collaborate."

"It will probably take another two or three months. I'll send you the results when they're available."

"Wow, that's fast! Your company is pretty impressive. Which university did you go to? You're so young to be working in the US."

"Haha, I came to the US to study, and then I made some money selling some things, so I just dropped out of school to start my own business."

Engineer Zhou paused for a moment, then asked excitedly, "Ah, you're Chen Yiran, right? Your news was all the rage in China a few months ago."

"Looks like I'm somewhat famous."

"You're not just somewhat famous, you're quite famous. But why did you choose this direction? It's a difficult path."

"I wrote a framework that seemed suitable for this direction, so I decided to give it a try."

What Engineer Zhou said at this moment is not easy to do, which is related to the problem of being held back by the government that China later encountered.

To put it bluntly, in 2010, China's chip industry was not really in a position to be held hostage by any means.

Having read news about chips online every day in her past life, Chen Yiran already knew quite a bit about them. After seeing the exhibition today, her understanding is even clearer.

SMIC's technology has only reached 45 nanometers, while Spreadtrum and RDA Microelectronics can only make baseband chips for low-end feature phones. They haven't even gotten close to smartphones. To put it bluntly, they can't compare to them at all.

It wasn't until SMIC started mass production of 28nm chips in 2016 and began to catch up with 14nm that things started to look promising.

ZTE, which Chinese people find very frustrating, and Meng Wanzhou's experience in Canada, are not actually being held hostage. They were just fined for violating the rules set by the United States for exporting to Iran. It just shows that the United States is a bit domineering.

SMIC and Huawei were truly hampered by technological bottlenecks, with SMIC suffering particularly terribly. Advanced process technologies were completely blocked, and the EUV lithography equipment they had paid for was never delivered. Later, even a domineering clause was introduced prohibiting US citizens and green card holders from working or providing services at SMIC.

But that's all in the future. The reason Zhou Gong is saying that the road ahead is difficult is because the past two years have been a period of chaos for the EDA industry.

Moore's Law is still in effect, but mass production processes are starting to falter. The 28-nanometer threshold has become very high, and design complexity has exploded. Furthermore, due to the rise of mobile phone chips, power consumption design has gone from being a nice bonus to a matter of survival.

All companies agree that 193nm immersion lithography can only last up to 45nm. Reaching 32nm/28nm requires a complete switch to EUV extreme ultraviolet lithography machines.

However, EUV extreme ultraviolet lithography machines cannot even produce prototypes yet. It is said that the light source power of the one that was sent out for testing was insufficient, the reflector broke as soon as it was exposed to light, and the vacuum environment could not be maintained at all.

This forced the manufacturing side to resort to various survival strategies such as double exposure and fin field-effect transistors. These extremely complex physical structures ultimately transformed into mathematical modeling problems that EDA software had to solve.

But Chen Yiran didn't care much, after all, he had a cheat code, and his solution was too different from others.

After chatting casually with Engineer Zhou for a few more minutes, Chen Yiran started browsing the exhibition again.

As they strolled around, they discussed their future plans with Jasmine in their minds.

Based on the information we've gathered from this exhibition, I believe we still have an advantage – a strong framework. Because of the US-China trade war, you've seen many related videos and news reports, and I have a fairly good understanding of the chip industry. Currently, it seems our best option is to bypass EUV lithography machines.

"Are you sure this is feasible? Everyone says it's hard to reach even smaller nanometers without EUV. Can't we get ahead of the curve now? Is it really impossible to develop an EUV lithography machine ourselves? You're an outsider, so give it your all. Before I was reborn, China didn't have an EUV lithography machine, and after I was reborn, we still don't. What a waste of my rebirth!"

Although the pre-production prototypes of EUV performed very poorly, it wasn't until 2012 that TSMC, Samsung, and Intel jointly invested billions of euros in ASML, and finally in 2018 they successfully used EUV lithography machines that could be used for industrial production, achieving more efficient mass production of 7 nanometers.

However, the possibility of us intercepting the deal is basically zero. EUV lithography machines are too complex. Zeiss mirrors, Cymer light sources, a single system requires 100,000 parts and 5,000 suppliers.

I cannot be certain whether all of China's manufacturing industry can meet the standards; it's highly likely that none can reach the production line level, with only a small portion reaching the laboratory level. Even if we have some first-mover advantage and advanced perspectives from later generations, we do not possess the capability to fully integrate them.

"So what do we do? We can't just stay stuck with this situation."

In its previous life, SMIC had already completed a 7nm solution that didn't require EUV. If our EDA tools can be optimized to their fullest potential, it can help improve yield rates even more. 3D packaging of chips will also be very helpful, and the total computing power achieved by combining them is not low.

Computational lithography is one of my strengths, and trust me, I can develop a better algorithm. Furthermore, because we are very clear about what we will be facing, we can clearly choose a design method that does not require EUV from the outset.

We can change the architecture by altering the manufacturing process, customizing the architecture, using dedicated dataflow, and implementing in-memory computing. Based on my current understanding, we can achieve a five- to ten-fold increase in computing power for the same number of transistors.

"However, the solutions you've proposed are too perfect and a bit unrealistic."

The linewidth and spacing required for 5 nanometers already exceed the physical limits of DUV multi-exposure, so this is a rigid physical limitation that we can never reach 3 nanometers.

However, this information comes from videos you watched in your past life. We need to verify these details, so it would be best to find a similar exhibition to learn from.

Chen Yiran began searching for Gao Dewei within the venue. As a seasoned veteran, he certainly knew to carefully learn about manufacturing-related knowledge and which exhibition was the best to attend.

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