"Next, I'll talk about the dark silicon problem. I've heard that the three major tech giants haven't done any systematic optimization for the dark silicon phenomenon yet? Let me explain our solution. I can say for sure that we have a unique optimization for preventing dark silicon."

Any chip using Grey's design inherently possesses advantages that other chips cannot match.

Chen Yiran pressed a button on the controller. Two heat maps appeared on the screen, side by side for comparison.

On the left is the placement data for Hisilicon, with the hotspot concentrated in a blob of red in the upper left corner, bordering on orange. On the right is the result of rerunning the same wafer on a Grey silicon optimized version; the red and orange hues have completely dissipated, turning into a thin layer of light green evenly spread across the entire wafer.

"I heard the term 'dark silicon' on Hot Chips a month ago. I know it's a purely physical property that can't be completely avoided."

However, is it possible to make some effective optimizations? Let's simplify the problem. Dark silicon, to put it bluntly, is a conspiracy between electricity and thermodynamics.

We cannot avoid the problem of electrons shuttling through the air for the time being, but we can at least solve some of the heat dissipation problem.

Our Grey engine can perform three-dimensional temperature field optimization, physically dispersing high-power cells and filling the center with cooler cells. This isn't post-processing; the placement itself treats the temperature gradient as a constraint on par with area and timing during runtime.

He turned to the next page, where he saw comparative data on temperature field optimization before and after for four use cases in ISPD 2006.

"That's not all. Everyone knows about the three threshold voltages on a chip. Design companies usually only use one Vt library because the complexity of mixed allocation is too high, and if not done well, it can be worse than using a single Vt. But when Grey does placement, it can run static timing analysis at the same time, automatically determining which path must prioritize speed and which path can sacrifice some speed for leakage current."

He turned to the next page, a comparison of power consumption before and after Vt mixing.

"The addition of these two new data dimensions is something that no EDA company has systematically integrated before."

This is the benefit of reinforcement learning: whatever reward function you give it, it will optimize accordingly.

If you want it to optimize area, timing, field gradient, and Vt allocation simultaneously, it can learn how to balance these four objectives in two million self-play games.

Traditional rule engines require rewriting half of their core algorithm to add an optimization objective, while Grey only needs to change one line of the reward function's weights.

The people from the three major EDA companies below had already turned ashen-faced; they had a very bad feeling from Chen Yiran's words.

I feel like the big one is coming.

"I know some people are thinking, you guys do placement work, why are you messing with our time series analysis work?"

The answer is that Grey already runs embedded timing analysis during placement. The data from static timing analysis is inside the placement process, not outside of it. Therefore, Vt allocation is not an additional feature; it's the same optimization problem as placement.

Chen Yiran pressed the controller again, and two cartoon characters appeared on the screen: a gray cat on the left and a bright red squirrel on the right.

"I hereby announce that the beta version of our CTS tool, kiki, is complete. It uses the deepclock framework built on deepflow, which allows for better integration with grey. We are confident that we can complete the commercial version within two months."

Do you think it's too fast? It's fast, that's the advantage of DeepFlow.

Our goal is to complete the entire design process EDA within one year, based on Deepflow.

It includes logic synthesis, placement, clock tree synthesis (CTS), routing, static timing analysis (STA), signal integrity, physical verification, power consumption analysis, design for manufacturability, functional simulation, and formal verification.

We need to seamlessly integrate every step of the front-end and back-end development process. I can state my goal directly: the previous three major EDA tools are outdated; it's time to embrace the new era.

There was no applause; almost everyone was stunned, shocked by Chen Yiran's declaration.

Unexpectedly, Nvidia made a strong announcement yesterday that it would dominate the entire chip industry.

An 18-year-old genius, with astonishing skills, directly declared that he would crush the three major EDA companies in one year.

Chen Yiran looked down and spotted some people who looked troubled. The technical staff from the three major companies were sitting together, which was easy to find. Chen Yiran knew where they were sitting before he went on stage.

Of the six people there, four looked terrible, as if they had been constipated for three days, while the other two looked like they had just finished constipating.

Chen Yiran chuckled mischievously and said, "I know there's a company that might be in a bit of a dilemma because their area of ​​expertise is relatively late in the process we just went through. If they're going to fail, they'll be the ones who fail first. And their main battlefield is OPC; OPC acceleration seems to be their most profitable business. Here, I have some good news to share with you all."

Another animal picture appeared on the big screen; it was a white rabbit.

"Tiya, our OPC software based on Deepflow has now completed its commercial version, and we are negotiating the specific contract details with Samsung and GlobalFoundries."

Samsung, perhaps to flex its muscles, provided a lot of supporting data.

A series of data comparison charts were displayed, and a noticeable commotion began to erupt below, because the various numbers were simply too frightening.

Tiya, using a single GPU server, achieved the same result as traditional OPC in 7 days in just six hours. Samsung seemed to be holding a mini-launch event in Chen Yiran's PowerPoint presentation, flexing its muscles and announcing that it had begun adopting a new testing method, running tests more than ten times each time to find the optimal solution.

This comparison is even more exaggerated than the EDA software example. Traditional OPC runs are extremely expensive, with electricity costs reaching astronomical figures. Engineers dare not run more than that, but Tiya runs them almost casually, sometimes more than ten times a day.

The people leading the discussion immediately became restless, some even standing up.

The EDA field in the design phase can be said to be monopolized by three companies.

However, in the manufacturing EDA sector, Mingdao is the absolute leader, with their OPC software holding an 80% market share.

Chen Yiran continued to deliver a blow: "This is not the end. Our ILT reverse lithography project is also underway and will yield results in the short term. In addition, with the Mask Data Prep mask data preparation, our goal is to complete all software support for mask data processing within six months."

Next comes process simulation, including TCAD process device simulation, CMP modeling, chemical mechanical polishing simulation, and Litho simulation, which simulates the entire lithography process.

Finally, there's production line control and yield, DRC/LVS physical verification, Yield Analysis, APC advanced process control, and Metrology measurement analysis.

The timeline remains one year; our goal is to integrate all EDA technology functions in the manufacturing sector.

Having said everything he needed to say, Chen Yiran thanked all the previously signed partners.

After Chen Yiran finished his 20-minute solo talk show, the next step, according to the schedule, was a 10-minute Q&A session.

However, Chen Yiran felt that he had already shared enough information today, and he didn't really want to answer any more questions. After sharing for twenty minutes, Chen Yiran felt that the previous excitement had passed, and now he felt very awkward being stared at by hundreds of people.

After telling the host, Chen Yiran and her company employees left the scene, and the host went on stage to announce the end of the meeting.

A lively discussion broke out, with most people excited. The young warrior who would challenge the evil dragon had finally appeared.

Moreover, it has the potential to transform into a major boss very soon.

Employees of Synopsys, Cadence, and Mentor Graphics.

His face went from flushed with anger to deathly pale with fear, and finally turned green as if he had been poisoned.

Now, as soon as the meeting ended, he rushed off, clearly eager to notify his superiors.

If left unchecked, the various data Chen Yiran presented today could really lead to the three companies discussing selling themselves within just one year.

This time, the challenger finally isn't charging like Don Quixote; it's really interesting.

Chen Yiran and his company team were preparing to leave; he wasn't very interested in the other technical meetings.

I'm planning to attend the robotics conference and closing ceremony the day after tomorrow. I've heard that Dr. Sebastian Troon, a pioneer in probabilistic robotics at Stanford University, will be giving a speech.

Chen Yiran wasn't interested in other people, but there were some who were interested in him.

Before the company group even reached the door, two people ran over.

One of them greeted Chen Yiran very politely.

"Hello Mr. Chen, I'm Rick Cassidy, Vice President of TSMC. Can we talk?"

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